X-Git-Url: https://git.llucax.com/z.facultad/66.09/etherled.git/blobdiff_plain/7bcd0c7f950ee940e78515a697ee4b18990dc9b8..0052faf6d85ec776823a1a33efc8d911b4b4e2f6:/pruebas/keil/red_test_anda/etherdev.h

diff --git a/pruebas/keil/red_test_anda/etherdev.h b/pruebas/keil/red_test_anda/etherdev.h
index f683064..32dbb57 100644
--- a/pruebas/keil/red_test_anda/etherdev.h
+++ b/pruebas/keil/red_test_anda/etherdev.h
@@ -3,7 +3,7 @@
 #ifndef ETHERDEV_H
 #define ETHERDEV_H
 
-#include "REG51.h"
+#include "reg51.h"
 
 extern unsigned char uip_buf[80];
 extern unsigned int uip_len;
@@ -11,10 +11,16 @@ extern unsigned int uip_len;
 
 #define ETH_DATA_PORT P2     // Adjust this to suit hardware.
 #define ETH_ADDR_PORT P1     // Adjust this to suit hardware.
-#define ETH_CTRL_PORT P3     // Adjust this to suit hardware.
-sbit IOW = ETH_CTRL_PORT^4;  // ISA slot pin B13, RTL8019AS pin 30, active low
-sbit IOR = ETH_CTRL_PORT^5;  // ISA slot pin B14, RTL8019AS pin 29, active low
-sbit NICE = ETH_CTRL_PORT^2; // A7, usado para activar placa de red
+#ifdef SDCC
+sbit at 0xB4 IOW;   // ISA slot pin B13, RTL8019AS pin 30, active low
+sbit at 0xB5 IOR;   // ISA slot pin B14, RTL8019AS pin 29, active low
+sbit at 0xB2 NICE;  // A7, usado para activar placa de red
+#else
+#define CTRL_PORT       P3  // Adjust this to suit hardware.
+sbit IOW = CTRL_PORT^4;     // ISA slot pin B13, RTL8019AS pin 30, active low
+sbit IOR = CTRL_PORT^5;     // ISA slot pin B14, RTL8019AS pin 29, active low
+sbit NICE = CTRL_PORT^2;    // A7, usado para activar placa de red
+#endif
 
 
 // Register base address
@@ -211,7 +217,7 @@ sbit NICE = ETH_CTRL_PORT^2; // A7, usado para activar placa de red
 #define RXSDEF     0x80    /* deferring */
 
 
-bit etherdev_init(void);
+bool etherdev_init(void);
 void etherdev_send(void);
 unsigned int etherdev_read(void);