1 // vim: set et sw=4 sts=4 :
7 /// Datos persistentes del módulo
8 static union // Unión porque nunca se usan ambos juntos
10 byte send_len; ///> Tamaño del frame que será enviado
11 byte next_pkt; ///> Próximo frame a obtener
15 /// Cambia de página sin modificar los demás bits del CR
16 #define SELECT_REG_PAGE(page) \
19 write_reg(CR, read_reg(CR) & ~(PS1 | PS0)); \
20 write_reg(CR, read_reg(CR) | (page << 6)); \
24 /// Aborta (o completa) el DMA limpiando el ISR
25 #define ABORT_DMA(flags) \
28 write_reg(CR, flags); \
29 write_reg(ISR, RDC); \
34 static void write_reg(unsigned char reg, unsigned char wr_data)
36 // Select register address.
37 ADDR_PORT &= ~ADDR_PORT_MASK;
40 // Output register data to port.
43 // Clock register data into RTL8019AS.
44 // IOR & IOW are both active low.
50 // Set register data port as input again.
51 DATA_PORT = DATA_PORT_MASK;
55 static unsigned char read_reg(unsigned char reg)
57 // Select register address.
58 ADDR_PORT &= ~ADDR_PORT_MASK;
61 // Enable register data output from RTL8019AS.
65 // Read register data from port.
68 // Disable register data output from RTL8019AS.
75 /** Resetea placa de red en caso de buffer overflow */
78 bit retransmit = read_reg(CR) & TXP;
80 // If the receive buffer ring has overflowed we dump the whole
81 // thing and start over. There is no way of knowing whether the
82 // data it contains is uncorrupted, or will cause us grief.
84 // Stop RTL8019AS and abort DMA operation.
87 // Wait for controller to halt after any current tx completes.
88 while(!(read_reg(ISR) & RST)) continue;
90 // Reset remote byte count registers.
91 write_reg(RBCR0, 0x00);
92 write_reg(RBCR1, 0x00);
94 // Check whether currently transmitting a packet.
97 // If neither a successful transmission nor a tx abort error
98 // has occured, then flag current tx packet for resend.
99 if(read_reg(ISR) & (PTX | TXE))
105 // Set transmit configuration register to loopback internally.
106 write_reg(TCR, MODE1);
108 // Restart the RTL8019AS.
109 write_reg(CR, START);
111 // Re-initialise last receive buffer read pointer.
112 write_reg(BNRY, RX_PAGE_START);
114 // Select RTL8019AS register page 1.
117 // Re-initialise current packet receive buffer page pointer.
118 write_reg(CURR, RX_PAGE_START + 1);
120 // Select RTL8019AS register page 0.
123 // Clear rx buffer overflow & packet received interrupt flags.
124 write_reg(ISR, PRX | OVW);
126 // Re-itialise transmit configuration reg for normal operation.
127 write_reg(TCR, MODE0);
131 // Retransmit packet in RTL8019AS local tx buffer.
132 write_reg(CR, START | TXP);
137 /** Inicializa dispositivo de red
138 * @return true si se inicializó correctamente, false si no
144 // Set IOR & IOW as they're active low.
149 // Set register data port as input.
150 DATA_PORT = DATA_PORT_MASK;
152 // Configure RTL8019AS ethernet controller.
154 // Keil startup code takes 4ms to execute (18.432MHz, X1 mode).
155 // That leaves plenty of time for the RTL8019AS to read it's
156 // configuration in from the 9346 EEPROM before we get here.
158 // Select RTL8019AS register page 0.
161 // Check if RTL8019AS fully reset.
162 if(!(read_reg(ISR) & RST))
167 // Stop RTL8019AS, select page 0 and abort DMA operation.
170 // Initialise data configuration register.
171 // FIFO threshold 8 bytes, no loopback, don't use auto send packet.
172 write_reg(DCR, FT1 | LS);
174 // Reset remote byte count registers.
175 write_reg(RBCR0, 0u);
176 write_reg(RBCR1, 0u);
178 // Receive configuration register to monitor mode.
181 // Initialise transmit configuration register to loopback internally.
182 write_reg(TCR, MODE1);
184 // Clear interrupt status register bits by writing 1 to each.
187 // Mask all interrupts in mask register.
188 write_reg(IMR, NONE);
190 // Obtengo MAC de la placa
191 write_reg(RBCR0, 12u); // Vamos a leer 12 bytes (2 x 6)
192 write_reg(RBCR1, 0u);
193 write_reg(RSAR0, 0u); // En la dirección 0x0000
194 write_reg(RSAR1, 0u);
195 write_reg(CR, READ); // Comienza lectura
196 for (i = 0; i < ETH_ADDR_SIZE; ++i)
198 eth_addr_local[i] = read_reg(RDMA);
199 read_reg(RDMA); // Ignoramos porque viene como un word
202 // Abort/ complete DMA operation.
205 // Set transmit page start.
206 write_reg(TPSR, TX_PAGE_START);
208 // Set receive buffer page start.
209 write_reg(PSTART, RX_PAGE_START);
211 // Initialise last receive buffer read pointer.
212 write_reg(BNRY, RX_PAGE_START);
214 // Set receive buffer page stop.
215 write_reg(PSTOP, RX_PAGE_STOP);
217 // Select RTL8019AS register page 1.
220 // Initialise current packet receive buffer page pointer
221 write_reg(CURR, RX_PAGE_START + 1);
223 // Set physical address
224 for (i = 0; i < ETH_ADDR_SIZE; ++i)
225 write_reg(PAR_BASE + i, eth_addr_local[i]);
227 // Restart RTL8019AS.
228 write_reg(CR, START);
230 // Initialise transmit configuration register for normal operation.
231 write_reg(TCR, MODE0);
233 // Receive configuration register to accept broadcast packets.
240 /** Comienza el envío de un nuevo frame
241 * @param len Tamaño del frame a enviar
243 void netdev_send_start()
245 persistent.send_len = 0;
246 // Wait until pending transmit operation completes.
247 while(read_reg(CR) & TXP) continue;
249 // Set remote DMA start address registers to indicate where to load packet.
250 write_reg(RSAR0, 0u);
251 write_reg(RSAR1, TX_PAGE_START);
253 // Set remote DMA byte count registers to indicate length of packet load.
254 write_reg(RBCR0, MAX_PACKET_LEN); // Tamaño máximo en principio
255 write_reg(RBCR1, 0u);
257 // Initiate DMA transfer of uip_buf & uip_appdata buffers to RTL8019AS.
258 write_reg(CR, WRITE);
261 /** Escribe un byte al buffer de la placa de red para ser enviado
262 * @precond netdev_send_start() debe haber sido ejecutada
263 * @param b Byte a enviar
265 void netdev_send_byte(byte b)
267 persistent.send_len++;
271 /** Escribe un word al buffer de la placa de red para ser enviado
272 * @precond netdev_send_start() debe haber sido ejecutada
273 * @param w Word a enviar
275 void netdev_send_word(uint16 w)
277 persistent.send_len += 2;
278 write_reg(RDMA, HIGH(w));
279 write_reg(RDMA, LOW(w));
282 /** Finaliza el envío del frame
283 * @precond netdev_send_start() debe haber sido ejecutada
285 void netdev_send_end()
287 // Abort/ complete DMA operation.
290 // Set transmit page start to indicate packet start.
291 write_reg(TPSR, TX_PAGE_START);
293 // Ethernet packets must be > 60 bytes, otherwise are rejected as runts.
294 if (persistent.send_len < MIN_PACKET_LEN)
296 persistent.send_len = MIN_PACKET_LEN;
299 // Set transmit byte count registers to indicate packet length.
300 write_reg(TBCR0, LOW(persistent.send_len));
301 write_reg(TBCR1, 0u);
303 // Issue command for RTL8019AS to transmit packet from it's local buffer.
304 write_reg(CR, START | TXP);
307 /** Comienza la lectura de un nuevo frame
308 * @return Cantidad de bytes del frame leído
310 byte netdev_recv_start()
312 // Check if the rx buffer has overflowed.
313 if (read_reg(ISR) & OVW)
317 // Select RTL8019AS register page 1.
320 // Retrieve current receive buffer page
321 current = read_reg(CURR);
323 // Select RTL8019AS register page 1.
326 if (read_reg(BNRY) == current)
328 printb(read_reg(ISR), 0x01);
329 printb(read_reg(BNRY), 0x02);
330 printb(current, 0x04);
335 // Check if there is a packet in the rx buffer.
336 else if (read_reg(ISR) & PRX)
340 byte status; // Estado del frame recibido
341 byte next; // Offset del próximo frame
342 uint16 len; // Tamaño del frame
348 // Retrieve packet header. (status, next_ptr, length_l, length_h)
350 // Set remote DMA start address registers to packet header.
351 bnry = read_reg(BNRY) + 1;
352 if (bnry >= RX_PAGE_STOP)
353 bnry = RX_PAGE_START;
354 write_reg(RSAR0, 0u);
355 write_reg(RSAR1, bnry);
357 // Select RTL8019AS register page 1.
360 // Retrieve current receive buffer page
361 current = read_reg(CURR);
363 // Select RTL8019AS register page 1.
366 // Check if last packet has been removed from rx buffer.
369 // Clear packet received interrupt flag.
370 write_reg(ISR, PRX | RXE);
374 // Set remote DMA byte count registers to packet header length.
375 write_reg(RBCR0, sizeof(struct buf_hdr_t));
376 write_reg(RBCR1, 0x00);
378 // Clear remote DMA complete interrupt status register bit.
381 // Initiate DMA transfer of packet header.
385 buf_hdr.status = read_reg(RDMA);
387 // Save next packet pointer.
388 buf_hdr.next = read_reg(RDMA);
390 // Indicamos cual es el próximo paquete para cuando termine
391 // FIXME poner más lindo para que consuma menos memoria
392 persistent.next_pkt = buf_hdr.next - 1;
394 // Retrieve packet data length and subtract CRC bytes.
395 buf_hdr.len = read_reg(RDMA) - sizeof(struct buf_hdr_t);
397 // Si es muy grande, muy chico o hubo error, lo descartamos
398 if ((buf_hdr.len < MIN_PACKET_LEN) || (buf_hdr.len > MAX_PACKET_LEN)
399 || ((buf_hdr.status & 0x0F) != RXSOK)
400 || read_reg(RDMA)) // Parte alta del tamaño
402 // Abort/ complete DMA operation.
405 // Advance boundary pointer to next packet start.
406 write_reg(BNRY, persistent.next_pkt);
411 // Set remote DMA start address registers to packet data.
412 write_reg(RSAR0, sizeof(struct buf_hdr_t));
413 write_reg(RSAR1, bnry);
415 // Set remote DMA byte count registers to packet data length.
416 write_reg(RBCR0, buf_hdr.len);
417 write_reg(RBCR1, 0u);
419 // Initiate DMA transfer of packet data.
427 /** Lee un byte del buffer de la placa de red
428 * @precond netdev_recv_start() debe haber sido ejecutada
430 byte netdev_recv_byte()
432 return read_reg(RDMA);
435 /** Lee un word del buffer de la placa de red
436 * @precond netdev_recv_start() debe haber sido ejecutada
438 uint16 netdev_recv_word()
440 uint16 w = netdev_recv_byte() << 8;
441 return w + netdev_recv_byte();
444 /** Finaliza la lectura del frame
445 * @precond netdev_recv_start() debe haber sido ejecutada
447 void netdev_recv_end()
449 // Abort/ complete DMA operation.
452 // Advance boundary pointer to next packet start.
453 write_reg(BNRY, persistent.next_pkt);