Cambio el hack feo del retardo por un hack algo menos feo. Además de chequear

por el flag OVW me fijo si BNRY == CURR antes de resetear la placa.
Con esto anda como piña, la floodeo con todas las ganas y no se resetea nunca.

diff --git a/pruebas/keil/red_test_anda/etherdev.c b/pruebas/keil/red_test_anda/etherdev.c
index 4675026e492215519b7bbc38c89404fa70ec6c8d..aa8f35fe99781888348151f04afa2b2517dbe0fa 100644 (file)
--- a/pruebas/keil/red_test_anda/etherdev.c
+++ b/pruebas/keil/red_test_anda/etherdev.c
@@ -408,26 +408,36 @@ static void etherdev_reset()
 static unsigned int etherdev_poll(void)
 {
     unsigned int len = 0;
-    // Retardo mega-bizarro, si no lo pongo a veces leo basura del ISR
-    unsigned char j;
-    for (j = 0; j < 0xFF; ++j);
 
     // Check if the rx buffer has overflowed.
     if (etherdev_reg_read(ISR) & OVW)
     {
-        leds1 = ~0x01;
-        leds2 = ~etherdev_reg_read(ISR);
-        sleep(5);
-        leds1 = ~0x02;
-        leds2 = ~etherdev_reg_read(BNRY);
-        sleep(5);
-        leds1 = ~0x04;
+        unsigned char current;
+
+        // Select RTL8019AS register page 1.
         ETHERDEV_SELECT_REG_PAGE(1);
-        leds2 = ~etherdev_reg_read(CURR);
+
+        // Retrieve current receive buffer page
+        current = etherdev_reg_read(CURR);
+
+        // Select RTL8019AS register page 1.
         ETHERDEV_SELECT_REG_PAGE(0);
-        sleep(5);
-        etherdev_reset();
-        len = 0;
+
+        if (etherdev_reg_read(BNRY) == current)
+        {
+
+            leds1 = ~0x01;
+            leds2 = ~etherdev_reg_read(ISR);
+            sleep(5);
+            leds1 = ~0x02;
+            leds2 = ~etherdev_reg_read(BNRY);
+            sleep(5);
+            leds1 = ~0x04;
+            leds2 = ~current;
+            sleep(5);
+
+            etherdev_reset();
+        }
     }
     // Check if there is a packet in the rx buffer.
     else if (etherdev_reg_read(ISR) & PRX)